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Alan Cox

External


Since: Jul 08, 2009
Posts: 28



(Msg. 1) Posted: Tue Nov 17, 2009 9:20 am
Post subject: [PATCH 0/5] Series short description
Archived from groups: linux>kernel (more info?)
Pending experimental bits. Not necessarily ready to apply but so folks know
what is going on.

---

Alan Cox (5):
pata_piccolo: Driver for old Toshiba chipsets
pata: Update experimental tags
cmd64x: implement serialization as per notes
pata_sis: Implement MWDMA for the UDMA 133 capable chips
pata_via: Blacklist some combinations of Transcend Flash and via


drivers/ata/Kconfig | 33 +++++++---
drivers/ata/Makefile | 1
drivers/ata/ata_generic.c | 5 +-
drivers/ata/pata_cmd64x.c | 132 +++++++++++++++++++++++++++++++++++++++--
drivers/ata/pata_piccolo.c | 140 ++++++++++++++++++++++++++++++++++++++++++++
drivers/ata/pata_sis.c | 88 +++++++++++++++++++++-------
drivers/ata/pata_via.c | 27 ++++++++
include/linux/pci_ids.h | 7 +-
8 files changed, 388 insertions(+), 45 deletions(-)
create mode 100644 drivers/ata/pata_piccolo.c

--
My Git tree is full of regressions, my git tree is full of bad C
My Git tree is full of regressions oh git-clone my codebase and see
Git-clone git-clone, oh git-clone my codebase and see, and see
Git-clone git-clone, oh git-clone my codebase and see

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Alan Cox

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Since: Jul 08, 2009
Posts: 28



(Msg. 2) Posted: Tue Nov 17, 2009 9:20 am
Post subject: [PATCH 5/5] pata_piccolo: Driver for old Toshiba chipsets [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
We were never able to get docs for this out of Toshiba for years. Dave
Barnes produced a NetBSD driver however and from that we can fill in the
needed tables

Signed-off-by: Alan Cox <alan.TakeThisOut@linux.intel.com>
---

drivers/ata/Kconfig | 25 +++++---
drivers/ata/Makefile | 1
drivers/ata/ata_generic.c | 5 +-
drivers/ata/pata_piccolo.c | 140 ++++++++++++++++++++++++++++++++++++++++++++
include/linux/pci_ids.h | 7 +-
5 files changed, 166 insertions(+), 12 deletions(-)
create mode 100644 drivers/ata/pata_piccolo.c


diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 36931e0..acca6b6 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -667,6 +667,15 @@ config PATA_SIS

If unsure, say N.

+config PATA_TOSHIBA
+ tristate "Toshiba Piccolo support (Experimental)"
+ depends on PCI && EXPERIMENTAL
+ help
+ Support for the Toshiba Piccolo controllers. Currently only the
+ primary channel is supported by this driver.
+
+ If unsure, say N.
+
config PATA_VIA
tristate "VIA PATA support"
depends on PCI
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 01e126f..d909435 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -63,6 +63,7 @@ obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o
obj-$(CONFIG_PATA_SC1200) += pata_sc1200.o
obj-$(CONFIG_PATA_SERVERWORKS) += pata_serverworks.o
obj-$(CONFIG_PATA_SIL680) += pata_sil680.o
+obj-$(CONFIG_PATA_TOSHIBA) += pata_piccolo.o
obj-$(CONFIG_PATA_VIA) += pata_via.o
obj-$(CONFIG_PATA_WINBOND) += pata_sl82c105.o
obj-$(CONFIG_PATA_WINBOND_VLB) += pata_winbond.o
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index ecfd22b..5daf507 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -168,9 +168,12 @@ static struct pci_device_id ata_generic[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), },
{ PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), },
{ PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), },
+#if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), },
- { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
+ { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
+ { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
+#endif
/* Must come last. If you add entries adjust this table appropriately */
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1},
{ 0, },
diff --git a/drivers/ata/pata_piccolo.c b/drivers/ata/pata_piccolo.c
new file mode 100644
index 0000000..1157da8
--- /dev/null
+++ b/drivers/ata/pata_piccolo.c
@@ -0,0 +1,140 @@
+/*
+ * pata_piccolo.c - Toshiba Piccolo PATA/SATA controller driver.
+ *
+ * This is basically an update to ata_generic.c to add Toshiba Piccolo support
+ * then split out to keep ata_generic "clean".
+ *
+ * Copyright 2005 Red Hat Inc, all rights reserved.
+ *
+ * Elements from ide/pci/generic.c
+ * Copyright (C) 2001-2002 Andre Hedrick <andre.TakeThisOut@linux-ide.org>
+ * Portions (C) Copyright 2002 Red Hat Inc <alan.TakeThisOut@redhat.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public License
+ *
+ * The timing data tables/programming info are courtesy of the NetBSD driver
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/blkdev.h>
+#include <linux/delay.h>
+#include <scsi/scsi_host.h>
+#include <linux/libata.h>
+
+#define DRV_NAME "pata_piccolo"
+#define DRV_VERSION "0.0.1"
+
+
+
+static void tosh_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u16 pio[6] = { /* For reg 0x50 low word & E088 */
+ 0x0566, 0x0433, 0x0311, 0x0201, 0x0200, 0x0100
+ };
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u16 conf;
+ pci_read_config_word(pdev, 0x50, &conf);
+ conf &= 0xE088;
+ conf |= pio[adev->pio_mode - XFER_PIO_0];
+ pci_write_config_word(pdev, 0x50, conf);
+}
+
+static void tosh_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u32 conf;
+ pci_read_config_dword(pdev, 0x5C, &conf);
+ conf &= 0x78FFE088; /* Keep the other bits */
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ int udma = adev->dma_mode - XFER_UDMA_0;
+ conf |= 0x80000000;
+ conf |= (udma + 2) << 28;
+ conf |= (2 - udma) * 0x111; /* spread into three nibbles */
+ } else {
+ static const u32 mwdma[4] = {
+ 0x0655, 0x0200, 0x0200, 0x0100
+ };
+ conf |= mwdma[adev->dma_mode - XFER_MW_DMA_0];
+ }
+ pci_write_config_dword(pdev, 0x5C, conf);
+}
+
+
+static struct scsi_host_template tosh_sht = {
+ ATA_BMDMA_SHT(DRV_NAME),
+};
+
+static struct ata_port_operations tosh_port_ops = {
+ .inherits = &ata_bmdma_port_ops,
+ .cable_detect = ata_cable_unknown,
+ .set_piomode = tosh_set_piomode,
+ .set_dmamode = tosh_set_dmamode
+};
+
+/**
+ * ata_tosh_init - attach generic IDE
+ * @dev: PCI device found
+ * @id: match entry
+ *
+ * Called each time a matching IDE interface is found. We check if the
+ * interface is one we wish to claim and if so we perform any chip
+ * specific hacks then let the ATA layer do the heavy lifting.
+ */
+
+static int ata_tosh_init_one(struct pci_dev *dev, const struct pci_device_id *id)
+{
+ static const struct ata_port_info info = {
+ .flags = ATA_FLAG_SLAVE_POSS,
+ .pio_mask = ATA_PIO5,
+ .mwdma_mask = ATA_MWDMA2,
+ .udma_mask = ATA_UDMA2,
+ .port_ops = &tosh_port_ops
+ };
+ const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
+ /* Just one port for the moment */
+ return ata_pci_sff_init_one(dev, ppi, &tosh_sht, NULL);
+}
+
+static struct pci_device_id ata_tosh[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), },
+ { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
+ { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
+ { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
+ { 0, },
+};
+
+static struct pci_driver ata_tosh_pci_driver = {
+ .name = DRV_NAME,
+ .id_table = ata_tosh,
+ .probe = ata_tosh_init_one,
+ .remove = ata_pci_remove_one,
+#ifdef CONFIG_PM
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+#endif
+};
+
+static int __init ata_tosh_init(void)
+{
+ return pci_register_driver(&ata_tosh_pci_driver);
+}
+
+
+static void __exit ata_tosh_exit(void)
+{
+ pci_unregister_driver(&ata_tosh_pci_driver);
+}
+
+
+MODULE_AUTHOR("Alan Cox");
+MODULE_DESCRIPTION("Low level driver for Toshiba Piccolo ATA");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(pci, ata_tosh);
+MODULE_VERSION(DRV_VERSION);
+
+module_init(ata_tosh_init);
+module_exit(ata_tosh_exit);
+
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d201220..bc449e5 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1496,9 +1496,10 @@
#define PCI_DEVICE_ID_SBE_WANXL400 0x0104

#define PCI_VENDOR_ID_TOSHIBA 0x1179
-#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102
-#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103
-#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105
+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0101
+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0102
+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_3 0x0103
+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_5 0x0105
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f
#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617

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Alan Cox

External


Since: Jul 08, 2009
Posts: 28



(Msg. 3) Posted: Tue Nov 17, 2009 9:20 am
Post subject: [PATCH 2/5] pata_sis: Implement MWDMA for the UDMA 133 capable chips [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
Bartlomiej pointed out that while this got fixed in the old driver whoever
did it didn't port it across.

Signed-off-by: Alan Cox <alan.RemoveThis@linux.intel.com>
---

drivers/ata/pata_sis.c | 91 ++++++++++++++++++++++++++++++++++++------------
1 files changed, 69 insertions(+), 22 deletions(-)


diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 488e77b..d70ecec 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -252,24 +252,25 @@ static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
}

/**
- * sis_133_set_piomode - Initialize host controller PATA PIO timings
+ * sis_133_do_piomode - Initialize host controller PATA PIO/DMA timings
* @ap: Port whose timings we are configuring
* @adev: Device we are configuring for.
*
* Set PIO mode for device, in host controller PCI config space. This
- * function handles PIO set up for the later ATA133 devices.
+ * function handles PIO set up for the later ATA133 devices. The same
+ * timings are used for MWDMA.
*
* LOCKING:
* None (inherited from caller).
*/

-static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
+static void sis_133_do_piomode(struct ata_port *ap, struct ata_device *adev,
+ int speed)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int port = 0x40;
u32 t1;
u32 reg54;
- int speed = adev->pio_mode - XFER_PIO_0;

const u32 timing133[] = {
0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
@@ -305,6 +306,42 @@ static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
}

/**
+ * sis_133_set_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device we are configuring for.
+ *
+ * Set PIO mode for device, in host controller PCI config space. This
+ * function handles PIO set up for the later ATA133 devices.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
+{
+
+ sis_133_do_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
+}
+
+/**
+ * mwdma_clip_to_pio - clip MWDMA mode
+ * @adev: device
+ *
+ * As the SiS shared MWDMA and PIO timings we must program the equivalent
+ * PIO timing for the MWDMA mode but we must not program one higher than
+ * the permitted PIO timing of the device.
+ */
+
+static int mwdma_clip_to_pio(struct ata_device *adev)
+{
+ const int mwdma_to_pio[3] = {
+ XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
+ };
+ return min(mwdma_to_pio[adev->dma_mode - XFER_MW_DMA_0],
+ adev->pio_mode - XFER_PIO_0);
+}
+
+/**
* sis_old_set_dmamode - Initialize host controller PATA DMA timings
* @ap: Port whose timings we are configuring
* @adev: Device to program
@@ -332,6 +369,7 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
if (adev->dma_mode < XFER_UDMA_0) {
/* bits 3-0 hold recovery timing bits 8-10 active timing and
the higher bits are dependant on the device */
+ speed = mwdma_clip_to_pio(adev);
timing &= ~0x870F;
timing |= mwdma_bits[speed];
} else {
@@ -372,6 +410,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
if (adev->dma_mode < XFER_UDMA_0) {
/* bits 3-0 hold recovery timing bits 8-10 active timing and
the higher bits are dependant on the device, bit 15 udma */
+ speed = mwdma_clip_to_pio(adev);
timing &= ~0x870F;
timing |= mwdma_bits[speed];
} else {
@@ -389,7 +428,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
* @adev: Device to program
*
* Set UDMA/MWDMA mode for device, in host controller PCI config space.
- * Handles UDMA66 and early UDMA100 devices.
+ * Handles later UDMA100 devices.
*
* LOCKING:
* None (inherited from caller).
@@ -400,21 +439,25 @@ static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int speed = adev->dma_mode - XFER_MW_DMA_0;
int drive_pci = sis_old_port_base(adev);
- u8 timing;
+ u16 timing;

- const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
+ const u16 udma_bits[] = {
+ 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
+ const u8 mwdma_bits[] = { 0x08, 0x32, 0x31 };

- pci_read_config_byte(pdev, drive_pci + 1, &timing);
+ pci_read_config_word(pdev, drive_pci, &timing);

if (adev->dma_mode < XFER_UDMA_0) {
- /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
+ speed = mwdma_clip_to_pio(adev);
+ timing &= ~0x80FF;
+ timing |= mwdma_bits[speed];
} else {
/* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
speed = adev->dma_mode - XFER_UDMA_0;
- timing &= ~0x8F;
+ timing &= ~0x8F00;
timing |= udma_bits[speed];
}
- pci_write_config_byte(pdev, drive_pci + 1, timing);
+ pci_write_config_word(pdev, drive_pci, timing);
}

/**
@@ -434,21 +477,26 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int speed = adev->dma_mode - XFER_MW_DMA_0;
int drive_pci = sis_old_port_base(adev);
- u8 timing;
- /* Low 4 bits are timing */
- static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
+ u16 timing;
+ /* Bits 15-12 are timing */
+ static const u16 udma_bits[] = {
+ 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100
+ };
+ static const u8 mwdma_bits[] = { 0x08, 0x32, 0x31 };

- pci_read_config_byte(pdev, drive_pci + 1, &timing);
+ pci_read_config_word(pdev, drive_pci, &timing);

if (adev->dma_mode < XFER_UDMA_0) {
- /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
+ speed = mwdma_clip_to_pio(adev);
+ timing &= ~0x80FF;
+ timing = mwdma_bits[speed];
} else {
/* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
speed = adev->dma_mode - XFER_UDMA_0;
- timing &= ~0x8F;
+ timing &= ~0x8F00;
timing |= udma_bits[speed];
}
- pci_write_config_byte(pdev, drive_pci + 1, timing);
+ pci_write_config_word(pdev, drive_pci, timing);
}

/**
@@ -479,13 +527,12 @@ static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
if (reg54 & 0x40000000)
port = 0x70;
port += (8 * ap->port_no) + (4 * adev->devno);
-
pci_read_config_dword(pdev, port, &t1);

if (adev->dma_mode < XFER_UDMA_0) {
- t1 &= ~0x00000004;
- /* FIXME: need data sheet to add MWDMA here. Also lacking on
- ide/pci driver */
+ speed = mwdma_clip_to_pio(adev);
+ sis_133_do_piomode(ap, adev, speed);
+ t1 &= ~4; /* UDMA off */
} else {
speed = adev->dma_mode - XFER_UDMA_0;
/* if & 8 no UDMA133 - need info for ... */

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Alan Cox

External


Since: Jul 08, 2009
Posts: 28



(Msg. 4) Posted: Tue Nov 17, 2009 9:20 am
Post subject: [PATCH 1/5] pata_via: Blacklist some combinations of Transcend Flash and via [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
Reported by Mikulas Patocka.

VIA VT82C586B + Transcend TS64GSSD25-M v0826 does not work in UDMA mode

Signed-off-by: Alan Cox <alan.DeleteThis@linux.intel.com>
---

drivers/ata/pata_via.c | 27 +++++++++++++++++++++++++++
1 files changed, 27 insertions(+), 0 deletions(-)


diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 88984b8..2fb8be2 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -337,6 +337,32 @@ static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
}

/**
+ * via_mode_filter - filter buggy device/mode pairs
+ * @dev: ATA device
+ * @mask: Mode bitmask
+ *
+ * We need to apply some minimal filtering for old controllers and at least
+ * one breed of Transcend SSD. Return the updated mask.
+ */
+
+static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
+{
+ struct ata_host *host = dev->link->ap->host;
+ const struct via_isa_bridge *config = host->private_data;
+ unsigned char model_num[ATA_ID_PROD_LEN + 1];
+
+ if (config->id == PCI_DEVICE_ID_VIA_82C586_0) {
+ ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
+ if (strcmp(model_num, "TS64GSSD25-M") == 0) {
+ ata_dev_printk(dev, KERN_WARNING,
+ "disabling UDMA mode due to reported lockups with this device.\n");
+ mask &= ~ ATA_MASK_UDMA;
+ }
+ }
+ return ata_bmdma_mode_filter(dev, mask);
+}
+
+/**
* via_tf_load - send taskfile registers to host controller
* @ap: Port to which output is sent
* @tf: ATA taskfile register set
@@ -427,6 +453,7 @@ static struct ata_port_operations via_port_ops = {
.prereset = via_pre_reset,
.sff_tf_load = via_tf_load,
.port_start = via_port_start,
+ .mode_filter = via_mode_filter,
};

static struct ata_port_operations via_port_ops_noirq = {

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Alan Cox

External


Since: Jul 08, 2009
Posts: 28



(Msg. 5) Posted: Tue Nov 17, 2009 9:20 am
Post subject: [PATCH 4/5] pata: Update experimental tags [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
Signed-off-by: Alan Cox <alan DeleteThis @linux.intel.com>
---

drivers/ata/Kconfig | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)


diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index f2df6e2..36931e0 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -374,7 +374,7 @@ config PATA_HPT366
If unsure, say N.

config PATA_HPT37X
- tristate "HPT 370/370A/371/372/374/302 PATA support (Experimental)"
+ tristate "HPT 370/370A/371/372/374/302 PATA support"
depends on PCI && EXPERIMENTAL
help
This option enables support for the majority of the later HPT
@@ -383,7 +383,7 @@ config PATA_HPT37X
If unsure, say N.

config PATA_HPT3X2N
- tristate "HPT 372N/302N PATA support (Experimental)"
+ tristate "HPT 372N/302N PATA support"
depends on PCI && EXPERIMENTAL
help
This option enables support for the N variant HPT PATA
@@ -401,7 +401,7 @@ config PATA_HPT3X3
If unsure, say N.

config PATA_HPT3X3_DMA
- bool "HPT 343/363 DMA support (Experimental)"
+ bool "HPT 343/363 DMA support"
depends on PATA_HPT3X3
help
This option enables DMA support for the HPT343/363
@@ -510,7 +510,7 @@ config PATA_NETCELL
If unsure, say N.

config PATA_NINJA32
- tristate "Ninja32/Delkin Cardbus ATA support (Experimental)"
+ tristate "Ninja32/Delkin Cardbus ATA support"
depends on PCI && EXPERIMENTAL
help
This option enables support for the Ninja32, Delkin and

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Alan Cox

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Since: Jul 08, 2009
Posts: 28



(Msg. 6) Posted: Tue Nov 17, 2009 9:20 am
Post subject: [PATCH 3/5] cmd64x: implement serialization as per notes [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
(Second attempt)

Daniela Engert pointed out that there are some implementation notes for the
643 and 646 that deal with certain serialization rules. In theory we don't
need them because they apply when the motherboard decides not to retry PCI
requests for long enough and the chip is busy doing a DMA transfer on the
other channel.

The rule basically is "don't touch the taskfile of the other channel while
a DMA is in progress". To implement that we need to

- not issue a command on a channel when there is a DMA command queued
- not issue a DMA command on a channel when there are PIO commands queued
- use the alternative access to the interrupt source so that we do not
touch altstatus or status on shared IRQ.

Signed-off-by: Alan Cox <alan.TakeThisOut@linux.intel.com>
---

drivers/ata/pata_cmd64x.c | 139 ++++++++++++++++++++++++++++++++++++++++++---
1 files changed, 131 insertions(+), 8 deletions(-)


diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index f98dffe..48948ae 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -31,7 +31,7 @@
#include <linux/libata.h>

#define DRV_NAME "pata_cmd64x"
-#define DRV_VERSION "0.2.5"
+#define DRV_VERSION "0.3.1"

/*
* CMD64x specific registers definition.
@@ -75,6 +75,13 @@ enum {
DTPR1 = 0x7C
};

+struct cmd_priv
+{
+ int dma_live; /* Channel using DMA */
+ int irq_t[2]; /* Register to check for IRQ */
+ int irq_m[2]; /* Bit to check */
+};
+
static int cmd648_cable_detect(struct ata_port *ap)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -254,17 +261,114 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc)
}

/**
- * cmd646r1_dma_stop - DMA stop callback
+ * cmd64x_bmdma_stop - DMA stop callback
* @qc: Command in progress
*
- * Stub for now while investigating the r1 quirk in the old driver.
+ * Track the completion of live DMA commands and clear the dma_live
+ * tracking flag as we do.
*/

-static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc)
+static void cmd64x_bmdma_stop(struct ata_queued_cmd *qc)
{
+ struct ata_port *ap = qc->ap;
+ struct cmd_priv *priv = ap->host->private_data;
ata_bmdma_stop(qc);
+ WARN_ON(priv->dma_live != ap->port_no );
+ priv->dma_live = -1;
}

+/**
+ * cmd64x_qc_defer - Defer logic for chip limits
+ * @qc: queued command
+ *
+ * Decide whether we can issue the command. Called under the host lock.
+ */
+
+static int cmd64x_qc_defer(struct ata_queued_cmd *qc)
+{
+ struct ata_host *host = qc->ap->host;
+ struct cmd_priv *priv = host->private_data;
+ struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
+ int rc;
+ int dma = 0;
+
+ /* Apply the ATA rules first */
+ rc = ata_std_qc_defer(qc);
+ if (rc)
+ return rc;
+
+ if (qc->tf.protocol == ATAPI_PROT_DMA ||
+ qc->tf.protocol == ATA_PROT_DMA)
+ dma = 1;
+
+ /* If the other port is not live then issue the command */
+ if (alt == NULL || !alt->qc_active) {
+ if (dma)
+ priv->dma_live = qc->ap->port_no;
+ return 0;
+ }
+ /* If there is a live DMA command then wait */
+ if (priv->dma_live != -1)
+ return ATA_DEFER_PORT;
+ if (dma) {
+ /* Cannot overlap our DMA command */
+ if (alt->qc_active)
+ return ATA_DEFER_PORT;
+ /* Claim the DMA */
+ priv->dma_live = qc->ap->port_no;
+ }
+ return 0;
+}
+
+/**
+ * cmd64x_interrupt - ATA host interrupt handler
+ * @irq: irq line (unused)
+ * @dev_instance: pointer to our ata_host information structure
+ *
+ * Our interrupt handler for PCI IDE devices. Calls
+ * ata_sff_host_intr() for each port that is flagging an IRQ. We cannot
+ * use the defaults as we need to avoid touching status/altstatus during
+ * a DMA.
+ *
+ * LOCKING:
+ * Obtains host lock during operation.
+ *
+ * RETURNS:
+ * IRQ_NONE or IRQ_HANDLED.
+ */
+irqreturn_t cmd64x_interrupt(int irq, void *dev_instance)
+{
+ struct ata_host *host = dev_instance;
+ struct pci_dev *pdev = to_pci_dev(host->dev);
+ struct cmd_priv *priv = host->private_data;
+ unsigned int i;
+ unsigned int handled = 0;
+ unsigned long flags;
+
+ /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
+ spin_lock_irqsave(&host->lock, flags);
+
+ for (i = 0; i < host->n_ports; i++) {
+ struct ata_port *ap;
+ u8 reg;
+
+ pci_read_config_byte(pdev, priv->irq_t[i], &reg);
+ ap = host->ports[i];
+ if (ap && (reg & priv->irq_m[i]) &&
+ !(ap->flags & ATA_FLAG_DISABLED)) {
+ struct ata_queued_cmd *qc;
+
+ qc = ata_qc_from_tag(ap, ap->link.active_tag);
+ if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
+ (qc->flags & ATA_QCFLAG_ACTIVE))
+ handled |= ata_sff_host_intr(ap, qc);
+ }
+ }
+
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ return IRQ_RETVAL(handled);
+}
static struct scsi_host_template cmd64x_sht = {
ATA_BMDMA_SHT(DRV_NAME),
};
@@ -273,6 +377,8 @@ static const struct ata_port_operations cmd64x_base_ops = {
.inherits = &ata_bmdma_port_ops,
.set_piomode = cmd64x_set_piomode,
.set_dmamode = cmd64x_set_dmamode,
+ .bmdma_stop = cmd64x_bmdma_stop,
+ .qc_defer = cmd64x_qc_defer,
};

static struct ata_port_operations cmd64x_port_ops = {
@@ -282,7 +388,6 @@ static struct ata_port_operations cmd64x_port_ops = {

static struct ata_port_operations cmd646r1_port_ops = {
.inherits = &cmd64x_base_ops,
- .bmdma_stop = cmd646r1_bmdma_stop,
.cable_detect = ata_cable_40wire,
};

@@ -290,6 +395,7 @@ static struct ata_port_operations cmd648_port_ops = {
.inherits = &cmd64x_base_ops,
.bmdma_stop = cmd648_bmdma_stop,
.cable_detect = cmd648_cable_detect,
+ .qc_defer = ata_std_qc_defer
};

static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
@@ -340,6 +446,8 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL };
u8 mrdmode;
int rc;
+ struct ata_host *host;
+ struct cmd_priv *cpriv;

rc = pcim_enable_device(pdev);
if (rc)
@@ -348,6 +456,17 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
class_rev &= 0xFF;

+ cpriv = devm_kzalloc(&pdev->dev, sizeof(*cpriv), GFP_KERNEL);
+ if (cpriv == NULL)
+ return -ENOMEM;
+ cpriv->dma_live = -1;
+
+ /* Table for IRQ checking */
+ cpriv->irq_t[0] = CFR;
+ cpriv->irq_m[0] = 1 << 2;
+ cpriv->irq_t[1] = ARTTIM23;
+ cpriv->irq_m[1] = 1 << 4;
+
if (id->driver_data == 0) /* 643 */
ata_pci_bmdma_clear_simplex(pdev);

@@ -360,20 +479,24 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
ppi[0] = &cmd_info[3];
}

+
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
pci_read_config_byte(pdev, MRDMODE, &mrdmode);
mrdmode &= ~ 0x30; /* IRQ set up */
mrdmode |= 0x02; /* Memory read line enable */
pci_write_config_byte(pdev, MRDMODE, mrdmode);

- /* Force PIO 0 here.. */
-
/* PPC specific fixup copied from old driver */
#ifdef CONFIG_PPC
pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
#endif
+ rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
+ if (rc)
+ return rc;
+ host->private_data = cpriv;

- return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL);
+ pci_set_master(pdev);
+ return ata_pci_sff_activate_host(host, cmd64x_interrupt, &cmd64x_sht);
}

#ifdef CONFIG_PM

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Bartlomiej Zolnierkiewicz

External


Since: Jan 12, 2005
Posts: 495



(Msg. 7) Posted: Tue Nov 17, 2009 1:20 pm
Post subject: Re: [PATCH 2/5] pata_sis: Implement MWDMA for the UDMA 133 capable chips [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On Tuesday 17 November 2009 15:51:17 Alan Cox wrote:
> Bartlomiej pointed out that while this got fixed in the old driver whoever
> did it didn't port it across.

Please add ',' before 'whoever' and change 'the old driver' to 'sis5513'
so it is at least passable as 'information manipulation' on what I really
said instead of just being a 'straight lie'.. Thanks!

> +/**
> + * mwdma_clip_to_pio - clip MWDMA mode
> + * @adev: device
> + *
> + * As the SiS shared MWDMA and PIO timings we must program the equivalent
> + * PIO timing for the MWDMA mode but we must not program one higher than
> + * the permitted PIO timing of the device.
> + */
> +
> +static int mwdma_clip_to_pio(struct ata_device *adev)
> +{
> + const int mwdma_to_pio[3] = {
> + XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
> + };
> + return min(mwdma_to_pio[adev->dma_mode - XFER_MW_DMA_0],
> + adev->pio_mode - XFER_PIO_0);
> +}

This wants to be in the generic libata code.

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Alan Cox

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Since: Sep 11, 2004
Posts: 997



(Msg. 8) Posted: Tue Nov 17, 2009 1:20 pm
Post subject: Re: [PATCH 2/5] pata_sis: Implement MWDMA for the UDMA 133 capable chips [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
> > +static int mwdma_clip_to_pio(struct ata_device *adev)
> > +{
> > + const int mwdma_to_pio[3] = {
> > + XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
> > + };
> > + return min(mwdma_to_pio[adev->dma_mode - XFER_MW_DMA_0],
> > + adev->pio_mode - XFER_PIO_0);
> > +}
>
> This wants to be in the generic libata code.

I'm not convinced because for the majority of drivers the libata timing
interface handles it. SiS needs it just because it does things by
precomputed tables. It's a one off interface.

Alan
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Bartlomiej Zolnierkiewicz

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Since: Jan 12, 2005
Posts: 495



(Msg. 9) Posted: Tue Nov 17, 2009 1:20 pm
Post subject: Re: [PATCH 3/5] cmd64x: implement serialization as per notes [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On Tuesday 17 November 2009 15:51:32 Alan Cox wrote:

> +struct cmd_priv
> +{
> + int dma_live; /* Channel using DMA */
> + int irq_t[2]; /* Register to check for IRQ */
> + int irq_m[2]; /* Bit to check */
> +};

irq_t and irq_m content will be identical for all host instances
so you may as well add one instance for it, use ->private_data to
store dma_live information and remove cmd_priv allocation

> + /* If the other port is not live then issue the command */
> + if (alt == NULL || !alt->qc_active) {
> + if (dma)
> + priv->dma_live = qc->ap->port_no;
> + return 0;
> + }
> + /* If there is a live DMA command then wait */
> + if (priv->dma_live != -1)
> + return ATA_DEFER_PORT;
> + if (dma) {
> + /* Cannot overlap our DMA command */
> + if (alt->qc_active)
> + return ATA_DEFER_PORT;

no need to check alt->qc_active again here

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Bartlomiej Zolnierkiewicz

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Since: Jan 12, 2005
Posts: 495



(Msg. 10) Posted: Tue Nov 17, 2009 1:20 pm
Post subject: Re: [PATCH 2/5] pata_sis: Implement MWDMA for the UDMA 133 capable chips [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On Tuesday 17 November 2009 18:38:23 Alan Cox wrote:
> > > +static int mwdma_clip_to_pio(struct ata_device *adev)
> > > +{
> > > + const int mwdma_to_pio[3] = {
> > > + XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
> > > + };
> > > + return min(mwdma_to_pio[adev->dma_mode - XFER_MW_DMA_0],
> > > + adev->pio_mode - XFER_PIO_0);
> > > +}
> >
> > This wants to be in the generic libata code.
>
> I'm not convinced because for the majority of drivers the libata timing
> interface handles it. SiS needs it just because it does things by
> precomputed tables. It's a one off interface.

Controllers based on *Intel* PIIX are in the disagreement with the above
paragraph and having generic helper to do conversion (without a clipping)
would bring us a little step closer to killing a needless code duplication
currently present in their ->set_piomode and ->set_dmamode methods.

[ In case somebody wonders: no, 'old' drivers don't have such duplication
and 'whoever did it didn't port it across' cause said 'whoever'-s were not
into the development of the square wheels.... ]

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Alan Cox

External


Since: Sep 11, 2004
Posts: 997



(Msg. 11) Posted: Tue Nov 17, 2009 1:20 pm
Post subject: Re: [PATCH 3/5] cmd64x: implement serialization as per notes [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On Tue, 17 Nov 2009 18:35:05 +0100
Bartlomiej Zolnierkiewicz <bzolnier.DeleteThis@gmail.com> wrote:

> On Tuesday 17 November 2009 15:51:32 Alan Cox wrote:
>
> > +struct cmd_priv
> > +{
> > + int dma_live; /* Channel using DMA */
> > + int irq_t[2]; /* Register to check for IRQ */
> > + int irq_m[2]; /* Bit to check */
> > +};
>
> irq_t and irq_m content will be identical for all host instances

Once I've had a look at the later chip variants I'll indeed do that
providing the 648 is ok in all revs.

> so you may as well add one instance for it, use ->private_data to
> store dma_live information and remove cmd_priv allocation
>
> > + /* If the other port is not live then issue the command */
> > + if (alt == NULL || !alt->qc_active) {
> > + if (dma)
> > + priv->dma_live = qc->ap->port_no;
> > + return 0;
> > + }
> > + /* If there is a live DMA command then wait */
> > + if (priv->dma_live != -1)
> > + return ATA_DEFER_PORT;
> > + if (dma) {
> > + /* Cannot overlap our DMA command */
> > + if (alt->qc_active)
> > + return ATA_DEFER_PORT;
>
> no need to check alt->qc_active again here

Good point

Thanks for the review.
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Alan Cox

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Since: Sep 11, 2004
Posts: 997



(Msg. 12) Posted: Tue Nov 17, 2009 1:20 pm
Post subject: Re: [PATCH 2/5] pata_sis: Implement MWDMA for the UDMA 133 capable chips [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
> > I'm not convinced because for the majority of drivers the libata timing
> > interface handles it. SiS needs it just because it does things by
> > precomputed tables. It's a one off interface.
>
> Controllers based on *Intel* PIIX are in the disagreement with the above

No the PIIX is quite different. You use the matching PIO timing (which is
a short lookup and shorter code than even a helper function call). You do
not use the clipping instead you set bit 3 to ensure that PIO cycles
occur at low speed but MWDMA runs at the right speed. That is usually a
win over picking a lower mode as the PIIX can do ATAPI DMA happily.

So the only thing you can "share" is what would be a 4 byte table.

> paragraph and having generic helper to do conversion (without a clipping)
> would bring us a little step closer to killing a needless code duplication
> currently present in their ->set_piomode and ->set_dmamode methods.
>
> [ In case somebody wonders: no, 'old' drivers don't have such duplication
> and 'whoever did it didn't port it across' cause said 'whoever'-s were not
> into the development of the square wheels.... ]

There is no duplication in the old drivers because they don't implement
the needed check and clipping/bit setting that I can see Wink

Alan
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Bartlomiej Zolnierkiewicz

External


Since: Jan 12, 2005
Posts: 495



(Msg. 13) Posted: Tue Nov 17, 2009 3:20 pm
Post subject: Re: [PATCH 2/5] pata_sis: Implement MWDMA for the UDMA 133 capable chips [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On Tuesday 17 November 2009 19:21:31 Alan Cox wrote:
> > > I'm not convinced because for the majority of drivers the libata timing
> > > interface handles it. SiS needs it just because it does things by
> > > precomputed tables. It's a one off interface.
> >
> > Controllers based on *Intel* PIIX are in the disagreement with the above
>
> No the PIIX is quite different. You use the matching PIO timing (which is
> a short lookup and shorter code than even a helper function call). You do
> not use the clipping instead you set bit 3 to ensure that PIO cycles
> occur at low speed but MWDMA runs at the right speed. That is usually a
> win over picking a lower mode as the PIIX can do ATAPI DMA happily.

Thank you for the detailed explanation, I certainly would still be
scratching my head over it if it wasn't for your great help.

> So the only thing you can "share" is what would be a 4 byte table.

You are of course right, I must have been confused by the old driver.

> > paragraph and having generic helper to do conversion (without a clipping)
> > would bring us a little step closer to killing a needless code duplication
> > currently present in their ->set_piomode and ->set_dmamode methods.
> >
> > [ In case somebody wonders: no, 'old' drivers don't have such duplication
> > and 'whoever did it didn't port it across' cause said 'whoever'-s were not
> > into the development of the square wheels.... ]
>
> There is no duplication in the old drivers because they don't implement
> the needed check and clipping/bit setting that I can see Wink

Seems like the whoever maintained the old driver didn't port across
this critical bugfix. Sad

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Jeff Garzik

External


Since: Nov 04, 2006
Posts: 972



(Msg. 14) Posted: Tue Nov 17, 2009 5:20 pm
Post subject: Re: [PATCH 4/5] pata: Update experimental tags [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On 11/17/2009 09:51 AM, Alan Cox wrote:
> Signed-off-by: Alan Cox<alan.RemoveThis@linux.intel.com>
> ---
>
> drivers/ata/Kconfig | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
>
> diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
> index f2df6e2..36931e0 100644
> --- a/drivers/ata/Kconfig
> +++ b/drivers/ata/Kconfig
> @@ -374,7 +374,7 @@ config PATA_HPT366
> If unsure, say N.
>
> config PATA_HPT37X
> - tristate "HPT 370/370A/371/372/374/302 PATA support (Experimental)"
> + tristate "HPT 370/370A/371/372/374/302 PATA support"
> depends on PCI&& EXPERIMENTAL


When you change the help string, you must also change the 'depends' line.

Jeff




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Bartlomiej Zolnierkiewicz

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Since: Jan 12, 2005
Posts: 495



(Msg. 15) Posted: Wed Nov 18, 2009 1:20 pm
Post subject: Re: [PATCH 4/5] pata: Update experimental tags [Login to view extended thread Info.]
Archived from groups: per prev. post (more info?)
On Tuesday 17 November 2009 15:51:39 Alan Cox wrote:
> Signed-off-by: Alan Cox <alan.TakeThisOut@linux.intel.com>
> ---
>
> drivers/ata/Kconfig | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
>
> diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
> index f2df6e2..36931e0 100644
> --- a/drivers/ata/Kconfig
> +++ b/drivers/ata/Kconfig
> @@ -374,7 +374,7 @@ config PATA_HPT366
> If unsure, say N.
>
> config PATA_HPT37X
> - tristate "HPT 370/370A/371/372/374/302 PATA support (Experimental)"
> + tristate "HPT 370/370A/371/372/374/302 PATA support"
> depends on PCI && EXPERIMENTAL
> help
> This option enables support for the majority of the later HPT
> @@ -383,7 +383,7 @@ config PATA_HPT37X
> If unsure, say N.
>
> config PATA_HPT3X2N
> - tristate "HPT 372N/302N PATA support (Experimental)"
> + tristate "HPT 372N/302N PATA support"
> depends on PCI && EXPERIMENTAL
> help
> This option enables support for the N variant HPT PATA

Maybe they are 'stable' but when it comes to features they are behind hpt366
(i.e. they lack PCI PM), which is also much cleaner than your drivers, easier
to understand and much smaller..

1609 drivers/ide/hpt366.c

432 drivers/ata/pata_hpt366.c
1041 drivers/ata/pata_hpt37x.c
594 drivers/ata/pata_hpt3x2n.c
2067 total

(we can still easily cut more than 100 LOC from hpt366)

Having separate drivers wasn't the best decisions from the maintainability
point-of-view. It added needless complexity (different chips share the same
PCI IDs which make detection across multiple drivers extremely painful) and
confusion (i.e. would you have guessed that HPT302 is supported by pata_hpt37x
while HPT302N by pata_hpt3x2n?).

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Bartlomiej Zolnierkiewicz
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